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50MHz to 1000MHz High-Linearity, Serial/
Parallel-Controlled Analog/Digital VGA
The user can employ the STATE_A and STATE_B logic-
input pins to apply each step as required (Table 4).
Toggling just the STATE_A pin (one control bit) yields
two preprogrammed attenuation states; toggling both
the STATE_A and STATE_B pins together (two control
bits) yield four preprogrammed attenuation states.
As an example, assume that the AGC application
requires a static attenuation adjustment to trim out gain
inconsistencies within a receiver lineup. The same AGC
circuit can also be called upon to dynamically attenuate
an unwanted blocker signal that could de-sense the
receiver and lead to an ADC overdrive condition. In this
example, the MAX2065 would be preprogrammed
(through the SPI bus) with two customized attenuation
states—one to address the static gain trim adjustment,
the second to counter the unwanted blocker condition.
Table 4. Preprogrammed Attenuation
State Settings
Toggling just the STATE_A control bit enables the user
to switch quickly between the static and dynamic atten-
uation settings with only one I/O pin.
If desired, the user can also program two additional
attenuation states by using the STATE_B control bit as
a second I/O pin. These two additional attenuation set-
tings are useful for software-defined radio applications
where multiple static gain settings may be needed to
account for different frequencies of operation, or where
multiple dynamic attenuation settings are needed to
account for different blocker levels (as defined by multi-
ple wireless standards).
Cascaded OIP3 Considerations
Due to both attenuator’s finite IP3 performance, the
cascaded OIP3 degrades when both attenuators are
set at higher attenuation states.
External Bias
Bias currents for the driver amplifier are set and opti-
STATE_A
0
1
0
1
STATE_B
0
0
1
1
DIGITAL ATTENUATOR
Preprogrammed attenuation state 1
Preprogrammed attenuation state 2
Preprogrammed attenuation state 3
Preprogrammed attenuation state 4
mized through external resistors. Resistors R1 and R1A
connected to RSET (pin 18) set the bias current for the
amplifier. The external biasing resistor values can be
increased for reduced current operation at the expense
of performance.
Table 5. Typical Application Circuit Component Values (HC Mode)
DESIGNATION
C1, C2, C7, C11
C3, C4, C6, C8, C9, C10
C12, C13
L1
R1, R1A
R2 (+3.3V applications only)
R3 (+3.3V applications only)
R4 (+5V applications and
using internal DAC only)
U1
VALUE
10nF
1000pF
150pF
470nH
10 Ω
1k Ω
2k Ω
47k Ω
—
SIZE
0402
0402
0402
1008
0402
0402
0402
0402
40-pin thin QFN-EP
(6mm x 6mm)
VENDOR
Murata Mfg. Co., Ltd.
Murata Mfg. Co., Ltd.
Murata Mfg. Co., Ltd.
Coilcraft, Inc.
Panasonic Corp.
Panasonic Corp.
Panasonic Corp.
Panasonic Corp.
Maxim Integrated
Products, Inc.
DESCRIPTION
X7R
C0G ceramic capacitor
C0G ceramic capacitor
1008CS-471XJLC
1%
1%
1%
1%
MAX2065ETL+
22
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